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Considerations of PCB stack design
2020-09-12
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Author:Dag      Share

What problems should be paid attention to in PCB stack design? Now let the ipcb engineers tell you.

There are two rules to follow when designing a stack.

1. Each routing layer must have an adjacent reference layer (power supply or stratum);

2. The distance between adjacent main power layer and stratum should be kept to provide larger coupling capacitance.

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Let's give an example of two, four and six ply boards to illustrate:

Option 1

Lamination of single side PCB and double sided PCB

For the two-layer board, the control of EMI radiation is mainly considered from the wiring and layout.

The EMC problem of single-layer board and double-layer board is more and more prominent. The main reason for this phenomenon is that the signal loop area is too large, which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. In order to improve the electromagnetic compatibility of transmission lines, the simple way is to reduce the loop area of key signals, which mainly refer to the strong radiation signals and the sensitive signals.

Single and double-layer plates are usually used in low-frequency simulation design below 10kHz

1) The power supply in the same layer is arranged in a radial manner, and the total length of the line is merged;

2) The power supply and ground wire shall be close to each other; a ground wire shall be placed beside the key signal line, which shall be as close as possible to the signal line. In this way, a smaller loop area is formed and the sensitivity of differential mode radiation to external interference is reduced.

3) If it is a double-layer circuit board, a ground wire can be laid along the signal line on the other side of the circuit board, close to the signal line, and the line should be as wide as possible.

Option 2

Lamination of four layer plates

1. SIG-GND(PWR)-PWR (GND)-SIG;

2. GND-SIG(PWR)-SIG(PWR)-GND;

The potential problem with the above two laminated designs is the traditional 1.6 mm (62 mil) plate thickness. The layer spacing will become very large, which is not conducive to the control of impedance, interlayer coupling and shielding; especially, the large spacing between power layers reduces the plate capacitance and is not conducive to noise filtering.

This scheme is usually used in the case of more on-board chips. This scheme can get better Si performance, but it is not very good for EMI performance. It is mainly controlled by routing and other details.

The second scheme is usually used when the density of the chip on the board is low enough and there is enough area around the chip. In this scheme, the outer layer of PCB is all stratum, and the middle two layers are signal / power layer. From the perspective of EMI control, this is the existing 4-layer PCB structure.

Main attention: the distance between the signal and power mixing layers of the middle two layers should be opened, and the wiring direction should be vertical to avoid crosstalk; the area of control board should be appropriate to reflect the 20h rule.

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Option 3

Lamination of six layer plates

For the design with high chip density and high clock frequency, the design of 6-layer board should be considered

1.SIG-GND-SIG-PWR-GND-SIG;

The signal layer is adjacent to the ground layer, the power layer and the ground layer are paired. The impedance of each layer can be well controlled, and the two layers can absorb magnetic lines.

2.GND-SIG-GND-PWR-SIG -GND;

This scheme is only suitable for the case where the device density is not very high. This stack has all the advantages of the upper stack, and the ground plane of the top layer and the bottom layer is relatively complete, so it can be used as a better shielding layer. Therefore, EMI performance is better than the other schemes.

Summary: compared with the second scheme, the cost of the second scheme will be greatly increased. Therefore, we usually choose one scheme when stacking.